Berkeley Lab Used 7,168 GPUs to Simulate Every Electromagnetic Field in a Quantum Chip Before It Was Built

Researchers at Lawrence Berkeley National Laboratory have accomplished the most physically comprehensive simulation of a quantum microchip ever performed, using nearly all 7,168 NVIDIA GPU processors on the Department of Energy's Perlmutter supercomputer to model, at the level of individual electromagnetic fields and real material properties, exactly how a quantum chip behaves during operation. The work, led by Zhi Jackie Yao and Andy Nonaka of Berkeley Lab's Applied Mathematics and Computational Research Division in collaboration with Irfan Siddiqi's group at Berkeley's Advanced Quantum Testbed, marks a fundamental shift in how quantum hardware is designed and validated before fabrication.

Previous approaches to quantum chip design relied on simplified models that treated the chip's quantum circuits as abstract mathematical objects rather than physical systems embedded in real materials. Those models could predict ideal performance but were blind to a host of physically real phenomena — electromagnetic crosstalk between adjacent qubits, parasitic resonances in the chip's substrate, signal reflections at material boundaries — that routinely cause real-world quantum chips to perform far worse than their design specifications. The Berkeley team's approach, by contrast, discretized a 10-millimeter-by-0.3-millimeter quantum chip into 11 billion individual grid cells and solved Maxwell's equations in time-domain across all of them simultaneously, modeling how actual electromagnetic signals propagate through actual materials including aluminum, silicon oxide, and sapphire.

'We discretized the chip into 11 billion grid cells,' Nonaka explained. 'We were able to run over a million time steps in seven hours.' The simulation consumed the full Perlmutter allocation — 7,168 GPUs running simultaneously for over 24 hours — to evaluate three different circuit configurations for the chip. In a single day of computation, the team predicted which circuit layout minimized electromagnetic crosstalk between qubits, identified potential resonance failure modes before fabrication, and optimized signal routing in ways conventional modeling tools would have missed. The approach uses Berkeley Lab's ARTEMIS code, originally developed for photonic device modeling and now adapted for quantum hardware.

The implications for quantum computing hardware development are substantial. Building a quantum chip is extraordinarily expensive: each fabrication run at a semiconductor foundry specializing in quantum devices costs hundreds of thousands of dollars and takes months. The industry's current practice of building chips, testing them, identifying failures, and iterating is enormously costly — and some failure modes only become apparent after multiple fabrication-test cycles. A simulation approach that predicts physical-level failure modes before any silicon is cut dramatically compresses the development timeline. Siddiqi, whose Advanced Quantum Testbed fabricates and tests quantum processors, confirmed the simulation identified a crosstalk issue in one of the three circuit configurations that would have only been discovered after a full fabrication run using traditional methods.

The technique opens the door to 'digital pre-fabrication' for quantum hardware — in which every prospective chip design is fully simulated at the physical level before material is ordered. The challenge, currently, is that the computational cost remains massive: 7,168 GPUs for 24 hours is beyond the resources of most quantum hardware developers. But the team noted that GPU performance improvements projected over the next five years could bring single-chip full-wave simulation into the range of a modestly equipped research lab. Berkeley Lab has begun discussions with IBM Quantum, Google Quantum AI, and Microsoft Azure Quantum about applying the technique to their respective hardware roadmaps, and the researchers say the ARTEMIS code will be made available to the broader quantum hardware community through the DOE's open-source software initiative.